1. Field of the Invention
The present invention relates to a semiconductor device and manufacturing method thereof, and more particularly, to a capacitor electrode structure used in a semiconductor memory device and manufacturing method thereof.
2. Description of the Background Art
Generally, a precious metal such as Pt, Ru or Ir or an oxide thereof is used for a lower electrode of a high dielectric capacitor of a semiconductor memory device. Electrical connection between the capacitor lower electrode and the semiconductor substrate is attained by forming a conducting plug formed of an impurity-doped polycrystalline silicon (polysilicon) therebetween, or alternatively, in order to ensure conduction with the conducting plug, by forming a barrier metal layer containing, as a main component, a refractory metal or metal having high melting point, such as Ti, Ta or W on a lower surface of the capacitor lower electrode.
FIG. 35 represents a conventional semiconductor device including a high dielectric capacitor. The semiconductor device includes an isolating insulating film 502 and an active region 503 at a main surface of a semiconductor substrate 501 and connected to other circuit portions by a word line 504 and a bit line 505. These portions are covered by an interlayer insulating film 506 to prevent a short-circuit. On active region 503, a conducting plug 507 is formed filling a contact hole penetrating through interlayer insulating film 506, and on conducting plug 507, capacitor lower electrode 528 is formed, as described above. On capacitor lower electrode 528 and interlayer insulating film 506, a capacitor dielectric 511 is formed and a capacitor upper electrode 512 is further formed thereon, providing a capacitor.
In the above described semiconductor device including the high dielectric capacitor, along with the increase in the degree of integration, the area of the capacitor lower electrode has been so reduced as to cause problems which cannot be addressed by the present lithography precision. More specifically, the upper surface of the conducting plug comes to be not fully covered by the capacitor lower electrode. In such a case, the capacitor dielectric and the conducting plug may unavoidably contact with each other or, even when not brought into contact, the dielectric and the conducting plug may be positioned to close to each other. In the following description, the expression that the upper surface of the conducting plug and the capacitor dielectric xe2x80x9ccontact with each otherxe2x80x9d refers to an actual contact as well as an arrangement in which the upper surface and the capacitor dielectric are positioned very close to each other though not in actual contact.
Generally, the conductive material for forming conducting plug 507 has, though slightly, a reducing property, as it contains a metal nitride as a main component. The high dielectric material used for capacitor dielectric 511 involves an oxide of Ba, Sr, Ti, Bi, Pb, Zr or the like.
When the capacitor dielectric 511 and conducting plug 507 contact with each other as mentioned above, a chemical reaction between the material of the conducting plug and the material of the capacitor insulator is induced near an interface therebetween during the step of heating. More specifically, the oxide forming the capacitor dielectric is reduced by the metal nitride forming the conducting plug, resulting in oxygen depleted region in the oxide. This means that a region 600 having poor insulation is formed in the capacitor dielectric, and therefore the insulation characteristic of the capacitor degrades (FIG. 35). Degraded insulation characteristic leads to leakage of charges stored in the capacitor, possibly causing defects in memory retention of the semiconductor memory device. Further, capacitor capacitance decreases and controllability of the capacitor electrode degrades.
When the capacitor dielectric and the conducting plug are in contact with each other or very close to each other, an end portion of the upper surface of the conducting plug has a portion not covered by the capacitor lower electrode but exposed, or a portion not yet but about to be exposed, positioned very close to an outer peripheral line on the lower surface of the capacitor lower electrode, in the manufacturing step where the capacitor lower electrode is formed during manufacturing the semiconductor device. Therefore, in the following description, the situation in which an end portion of the upper surface of the conducting plug xe2x80x9ccontactsxe2x80x9d the capacitor dielectric and a situation in which the end portion of the upper surface is xe2x80x9cpositioned very closexe2x80x9d to the capacitor dielectric, though not actually, in contact also refer to the situation where the end portion is respectively xe2x80x9cexposedxe2x80x9d and xe2x80x9calmost exposedxe2x80x9d, and the situation where the end portion is xe2x80x9cexposedxe2x80x9d also includes a situation where the upper surface of the conducting plug and the capacitor dielectric are xe2x80x9cvery closexe2x80x9d, unless indicated otherwise.
An object of the present invention is to provide a semiconductor device in which the capacitor dielectric and the conducting plug are separated from each other by such a distance that prevents chemical reaction therebetween even when the end portion of an upper surface of the conducting plug is exposed because of misregistration in lithography, and to provide a manufacturing method thereof.
According to a first aspect, the present invention provides a semiconductor device including an interlayer insulating film formed on a main surface of a semiconductor substrate, a conducting plug formed in a contact hole penetrating through the interlayer insulating film, a capacitor lower electrode formed on the conducting plug and on the interlayer insulating film, and a capacitor dielectric formed to cover the capacitor lower electrode and the interlayer insulating film, wherein an end portion on the upper surface of the conducting plug which is closer to a sidewall of the capacitor lower electrode has a portion overlapping the vicinity of an outer periphery of an upper surface of the capacitor lower electrode when viewed two-dimensionally, and a chemically inactive member is formed in the vicinity of the end portion of the upper surface of the conducting plug between and separating the end portion of the conducting plug and the capacitor dielectric.
In the specification, the xe2x80x9cchemically inactive materialxe2x80x9d forming the chemically inactive member refers to an insulator such as an oxide or a nitride or a precious metal (precious metal of a single element such as Pt, an alloy of precious metals such as PtIr, an alloy of a precious metal and a metal, a precious metal containing O or the like, a compound of the precious metal containing O or the like, or a mixture of the precious metal and the compound such as PtOx, a mixture of Pt and PtO2 or the like).
As described above, when a chemically inactive material is formed in the vicinity of an end portion having the overlapping portion at the upper surface of the conductive plug, the capacitor dielectric and the conducting plug can be separated from each other with a sufficient distance therebetween. Therefore, there is no possibility of chemical reaction between the capacitor dielectric and the conducting plug, and superior insulation characteristic of the capacitor dielectric is ensured. Therefore, during the operation of the semiconductor device in accordance with the present invention, stored charges are never leaked, and memory retention is surely maintained. Further, decrease in capacitor capacitance or degraded controllability of the capacitor are not experienced. Here, xe2x80x9cvicinity of an end portionxe2x80x9d encompasses the end portion itself and its periphery.
In the semiconductor device in accordance with the first aspect described above, in some cases where miniaturization proceeds exceeding the lithography precision, the above described end portion at the upper surface of the conducting plug has a portion extended out from an outer periphery of the upper surface of the capacitor lower electrode, when viewed two-dimensionally.
When the end portion of the upper surface of the conducting plug has a portion extended out of the outer periphery of the upper surface of the capacitor lower electrode when viewed two-dimensionally, it means that the end portion has a portion which is brought into contact with the capacitor dielectric, unless there is formed a chemically inactive member in the vicinity of the end portion. In the semiconductor device in accordance with the first aspect, there is a chemically inactive member existing between the end portion and the capacitor dielectric, and therefore chemical reaction in the subsequent step of heating can be prevented. Therefore, even when there is a misregistration at the time of lithography, the capacitor dielectric having superior insulation characteristic can be maintained. More specifically, even when there is variation in the step of lithography, the semiconductor device of the present invention is free of leakage of stored charges, with less-variation-influenced controllability and capacitances of capacitor.
Further, in another situation where miniaturization proceeds exceeding lithography precision, the end portion of the upper surface of the conducting plug has the aforementioned overlapping portion and is within a region on the upper surface of the capacitor lower electrode, when viewed two-dimensionally.
Even in this case, in which the end portion having the overlapping portion at the upper surface of the conducting plug is within the region of the upper surface of the capacitor lower electrode when viewed two-dimensionally, chemical reaction occurs through the capacitor lower electrode or the interlayer insulating film, if the capacitor dielectric and the conducting plug are at a close distance. In this case also, as in the semiconductor device in accordance with the first aspect described above, it becomes possible to prevent chemical reaction by forming a chemically inactive member in the vicinity of the end portion having the overlapping portion at the upper surface of the conducting plug to separate the conducting plug from the capacitor dielectric with a sufficient distance. As a result, a capacitor dielectric having superior insulation characteristic is provided.
In the semiconductor device in accordance with the first aspect described above, preferably, an insulator which is a compound of a material constituting the conducting plug is formed as a chemically inactive member, at the end portion of the upper surface of the conducting plug.
As an insulating member is formed by a chemical reaction of oxygen or the like with the material constituting the conducting plug at the end portion having the overlapping portion of the upper surface of the conducting plug, the capacitor dielectric and the conducting plug are separated from each other with a sufficient distance. Therefore, in the step of heating after the capacitor is formed, degradation of the insulating characteristic of the capacitor dielectric caused by a chemical reaction is prevented. More specifically, an insulating member can be formed surely in a simple manner.
In the semiconductor device in accordance with the first aspect described above, the capacitor lower electrode tapered to be wider from the upper surface toward the lower surface preferably covers, as a chemically inactive member, the end portion of the upper surface of the conducting plug.
As the capacitor lower electrode tapered to be wider from the upper to the lower surface covers, as an inactive material, the end portion having the overlapping portion of the upper surface of the conducting plug, it becomes possible to separate the capacitor dielectric from the conducting plug with sufficient distance kept therebetween. As a result, degradation of insulating characteristic of the capacitor dielectric can be prevented, while eliminating the possibility of increased electrical resistance at the connecting portion between the upper surface of the conducting plug and the capacitor lower electrode.
In the semiconductor device in accordance with the first aspect, a chemically inactive sidewall extension is desirably formed as an inactive member on a side surface portion of the capacitor lower electrode to cover the end portion of the upper surface of the conducting plug.
Maximum width of the end portion of the upper surface of the conducting plug extended out from the boundary on the upper surface of the capacitor lower electrode is, in cross section, generally about 0.1 xcexcm. Therefore, when the sidewall extension is formed on the side surface portion of the capacitor lower electrode, it becomes possible to separate the capacitor dielectric from the conducting plug by a sufficient distance. As the sidewall extension is formed by a chemically inactive material, chemical reaction between the capacitor dielectric and the conducting plug is prevented, and hence superior insulating characteristic of the capacitor dielectric is not impaired.
In the semiconductor device in accordance with the first aspect of the present invention described above, desirably, the capacitor lower electrode is formed of a barrier metal layer and a precious metal layer, and further, the chemically inactive metal is formed additionally on the side surface of the barrier metal layer so that the member is interposed between the barrier metal layer and the capacitor dielectric to separate these from each other.
As already described, the precious metal refers to a precious metal of a single element such as Pt, an alloy of precious metals such as PtIr, an alloy of a precious metal and a metal, a precious metal containing O or the like or a compound thereof or a mixture thereof, for example, PtOx, a mixture of Pt and PtO2.
As described above, the chemically inactive material is formed on the sidewall of the barrier metal in addition to the vicinity of the end portion having the overlapping portion of the upper surface of the conducting plug, and therefore the capacitor dielectric can be separated at both portions. As a result, chemical reaction of the capacitor dielectric can be prevented both in the vicinity of the interface between the capacitor dielectric and the barrier metal sidewall and in the vicinity of the interface between the capacitor dielectric and the end portion of the upper surface of the conducting plug. More specifically, the insulating characteristic of the capacitor dielectric is not degraded at both interfaces, and therefore the charges stored in the capacitor dielectric never leaks. Further, decrease of the capacitor capacitance or degradation of the controllability of the capacitor is not experienced either.
In the semiconductor device in accordance with the first aspect having a barrier metal layer on the capacitor lower electrode, desirably, the chemically inactive material formed on the sidewall of the barrier metal is an insulator formed of a compound of a material constituting the barrier metal formed on the sidewall of the barrier metal, and the chemically inactive member formed on the end portion of the upper surface of the conducting plug is an insulator formed of a compound of a material constituting the conducting plug, formed on the end portion of the upper surface of the conducting plug.
As the insulator formed of a compound of the material constituting the barrier metal and an insulator formed of the compound of the material constituting the conducting plug are formed as the chemically inactive members at prescribed positions, degradation of the insulating characteristic of the capacitor dielectric can surely be prevented in a simple manner.
In the semiconductor device described above, desirably, the chemically inactive member formed at the end portion of the upper surface of the conducting plug and on the sidewall of the barrier metal is a sidewall extension formed so as to cover the end portion of the upper surface of the conducting plug, at the side surface portion of the capacitor lower electrode, formed of a barrier metal layer and precious metal layer.
By the provision of the above described chemically inactive sidewall extension, it becomes possible to separate the portion causing a chemical reaction with the capacitor dielectric in the subsequent step of heating can be separated with a sufficient distance. Therefore, it becomes possible to maintain the superior insulating characteristic of the capacitor dielectric, while eliminating the possibility of increase in electrical resistance at the connecting portion between the capacitor lower electrode and the conducting plug.
The method of manufacturing a semiconductor device in accordance with the present invention includes the steps of forming an interlayer insulating film on a main surface of a semiconductor substrate, forming a conducting plug by filling a conducting material in a contact hole penetrating through the interlayer insulating film, forming a capacitor lower electrode layer on the conducting plug and the interlayer insulating film, forming a resist pattern of the capacitor lower electrode on the capacitor lower electrode layer such that the vicinity of the outer periphery of the lower surface thereof and an end portion of an upper surface of the conducting plug are arranged overlapping with each other when viewed two-dimensionally, forming the capacitor lower electrode by etching the capacitor lower electrode layer using the resist pattern as a mask, and forming the capacitor dielectric layer to cover the interlayer insulating film and the capacitor lower electrode, which method further includes, preceding the step of forming the capacitor dielectric layer, the step of forming a chemically inactive material in the vicinity of the end portion of the upper surface of the conducting plug so that the member is interposed between the end portion of the upper surface of the conducting plug and the capacitor dielectric layer to separate these from each other.
When the end portion of the upper surface of the conducting plug has a portion overlapping with the vicinity of an outer periphery of the lower surface of the capacitor lower electrode, the chemically inactive member is formed at the end portion, and therefore, the conducting plug and the capacitor dielectric can be separated with a sufficient distance therebetween. Therefore, chemical reaction with the capacitor dielectric and the conducting plug in the subsequent step of heating can be prevented. As a result, even if the end portion of the upper surface of the conducting plug is exposed because of misregistration in lithography, superior insulation characteristic of the capacitor dielectric can be maintained.
In the method of manufacturing a semiconductor device of the present invention described above, desirably, in the step of forming a chemically inactive material, a sidewall extension formed of a chemically inactive material is formed to cover the end portion of the upper surface of the conducting plug, on a side surface portion of the capacitor lower electrode.
By the aforementioned sidewall extension, it becomes possible to separate the capacitor dielectric and the conducting plug from each other with a sufficient distance. Therefore, degradation of the insulating characteristic of the capacitor dielectric caused by a chemical reaction between the capacitor dielectric and the conducting plug in the subsequent step of heating can be avoided.
In the method of manufacturing a semiconductor device in accordance with the present invention, desirably, the step of forming the capacitor lower electrode layer includes the step of forming a barrier metal layer, which is a lower layer of the capacitor lower electrode layer, and forming a precious metal layer which is an upper layer of the capacitor lower electrode layer, and said step of forming a chemically inactive member is desirably a step of forming the chemically inactive member both at a sidewall of the barrier metal and in the vicinity of the end portion of the upper surface of the conducting plug such that the member is interposed between the barrier metal sidewall of the capacitor lower electrode and the capacitor dielectric layer and between the end portion of the upper surface of the conducting plug and the capacitor dielectric layer to separate respective elements from each other.
As described above, the chemically inactive material is formed both on the barrier metal sidewall and in the vicinity of the end portion of the upper surface of the conducting plug, these portions can be separated from the capacitor dielectric by sufficient distances. As a result, degradation of the insulating characteristic of the capacitor dielectric derived from a chemical reaction in the subsequent step of heating can be prevented.
In the method of manufacturing a semiconductor device of the present invention, desirably, by the step of forming a chemically inactive member, a chemically inactive sidewall extension is formed to cover the end portion of the upper surface of the conducting plug, on a side surface portion of the capacitor lower electrode formed of a barrier metal layer and a precious metal layer.
As the chemically inactive sidewall extension is formed to cover the end portion of the upper surface of the conducting plug on the side surface portion of the capacitor lower electrode, it becomes possible to separate the capacitor dielectric from the barrier metal and from the conducting plug by a sufficient distance. As a result, degradation of the insulating characteristic of the capacitor dielectric derived from the chemical reaction between the capacitor dielectric and the barrier metal sidewall or the conducting plug can be prevented.
The method of manufacturing a semiconductor device in accordance with another aspect includes the steps of forming an interlayer insulating film on a main surface of a semiconductor substrate, forming a conducting plug by filling a conducting material in a contact hole penetrating through the interlayer insulating film, forming a capacitor lower electrode layer on the conducting plug and on the interlayer insulating film, forming a capacitor lower electrode resist pattern on the capacitor lower electrode layer, and forming a capacitor lower electrode having its side surface tapered to be wider from the upper to the lower surface, by etching the capacitor lower electrode layer using the resist pattern as a mask.
As the capacitor lower electrode having the side surface tapered to be wider from the upper to the lower surface is formed, the conducting plug and the capacitor dielectric can be separated from each other even when there is a misalignment of the resist pattern to some extent. As a result, degradation of the insulating characteristic of the capacitor dielectric derived from a chemical reaction in the subsequent step of heating can be avoided. Therefore, the present invention provides a stable method of manufacturing a high quality semiconductor device, which is less susceptible to the influence of misregistration of the resist pattern.
In the method of manufacturing a semiconductor device in accordance with another aspect of the present invention, desirably, the vicinity of the outer periphery of the lower surface of the capacitor lower electrode resist pattern has a portion overlapping with the end portion of the upper surface of the conducting plug when viewed two-dimensionally, and the step of forming the tapered capacitor lower electrode is performed such that the end portion of the upper surface of the conducting plug is covered.
As the capacitor lower electrode tapered to be wider is formed to cover the end portion of the upper surface of the conducting plug, the capacitor dielectric and the conducting plug can be separated from each other. Therefore, degradation in insulating characteristic of the capacitor dielectric derived from a chemical reaction in the subsequent step of heating can be prevented.
Further, in the method of manufacturing a semiconductor device in accordance with the aforementioned another aspect of the present invention, desirably, the capacitor lower electrode layer is formed of a precious metal, and the step of forming the capacitor lower electrode tapered to be wider includes the step of tapering the capacitor lower electrode, utilizing a phenomenon in which during etching of the capacitor lower electrode layer, once etched and scattered etch material of the capacitor lower electrode layer is re-deposited on the side surface portion of the etch material and the resist pattern when the flow rate of the etching gas is lowered.
As described above, the phenomenon of re-deposition of the etch material once etched and vaporized is utilized, it becomes possible to form a capacitor lower electrode tapered widely to cover the end portion of the upper surface of the conducting plug in a simple manner. As a result, the capacitor lower electrode and the capacitor dielectric can be separated from each other, and degradation in insulating characteristic of the capacitor dielectric derived from a chemical reaction between the capacitor dielectric and the conducting plug in the subsequent step of heating can be prevented.
When the capacitor lower electrode is formed of ruthenium, which is a precious metal, in the method of manufacturing a semiconductor device in accordance with the aforementioned another aspect of the present invention, desirably, the etching of the capacitor lower electrode layer is performed under the following conditions: main component of the etching gas is a mixed gas of oxygen and chlorine with the chlorine concentration being 2.5 to 20%, total gas flow rate is at least 400 sccm, discharging pressure is 10 to 50 mTorr, and gas residence time is at most 45 msec.
The magnitude of the taper angle is determined by two factors, that is, the length of the gas residence time and gas concentration (pressure). Therefore, it is important to define the taper angle by the gas residence time and the pressure. The flow rate is in reverse proportion to the gas residence time, and therefore the flow rate is determined uniquely once the gas residence time is determined. Therefore, it is difficult to control the taper angle using the total gas flow rate only as an index, because the gas residence time varies dependent on the evacuation rate, even if the taper angle is to be controlled by the total gas flow rate.
As the capacitor lower electrode layer formed of ruthenium is etched under the above described conditions, once etched ruthenium is redeposited on the side surface of the resist pattern and the capacitor lower electrode which is being etched. As a result, a capacitor lower electrode having a tapered side surface widening downward, covering the end portion of the upper surface of the conducting plug, can be formed. Therefore, the capacitor dielectric and the conducting plug are separated from each other by a sufficient distance. Because of this separation, there is no chemical reaction between the capacitor dielectric and the conducting plug in the subsequent step of heating, and therefore degradation of insulating characteristic of the capacitor dielectric can be prevented.
The foregoing and other objects, features, aspects and advantages of the present invention will become more apparent from the following detailed description of the present invention when taken in conjunction with the accompanying drawings.